1. Field of the Invention
This invention relates to computing systems, and more particularly, to efficient management of processor discrete operating points.
2. Description of the Relevant Art
The power consumption of modern integrated circuits (IC's) has become an increasing design issue with each generation of semiconductor chips. As power consumption increases, more costly cooling systems such as larger fans and heat sinks are utilized to remove excess heat and prevent IC failure. However, cooling systems increase the system cost. The IC power dissipation constraint is not only an issue for portable computers and mobile communication devices, but also for high-performance superscalar microprocessors, which may include multiple processor cores, or cores, and multiple pipelines within a core.
The power consumption of IC's, such as modern complementary metal oxide semiconductor (CMOS) chips, is proportional to at least the expression fV2. The symbol f is the operational frequency of the chip. The symbol V is the operational voltage of the chip. In modern microprocessors, both parameters f and V may be varied during operation of the IC. For example, during operation, modern processors allow users to select one or more intermediate power-performance states between a maximum performance state and a minimum power state. The maximum performance state includes a maximum operating frequency and the minimum power state includes a minimum operating frequency. The intermediate discrete power-performance states (P-states) include given scaled values for a combination of the operating frequency and the operational voltage.
Software, such as an operating system or firmware, or hardware may select a particular P-state based on at least a projected time to change states, a selected power limit, workload characteristics, and inputs from on-chip power monitors corresponding to a current workload. However, a computed combination of operational frequency and operational voltage typically does not match a combination corresponding to a discrete given P-state. Therefore, a close-matching given P-state is chosen. Typically, this chosen P-state may correspond to a power consumption lower than a computed power limit. Accordingly, the performance of the chosen P-state is lower than a computed power limit. If several more discrete P-states are added to a processor to provide finer grain combinations of operational frequency and voltage, then the design and test costs of the processor increase.
In view of the above, efficient methods and mechanisms for management of processor discrete operating points are desired.